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  july 2015 docid028063 rev 1 1 / 6 for further information contact your local stmicroelectronics sales office www.st.com steval - ids001v5m 915 mhz rf usb dongle based on the spirit1 spsgrf - 915 module data brief features ? rf spirit1 usb dongle based on spsgrf - 915 for 915 mhz ? spsgrf - 915 module is based on: ? spirit1 rf sub - ghz ? integrated filter/balun ? chip antenna ? on board stm23l low power 32 - bit arm? cortex - m3? microcontroller ? modulation schemes: 2 - fsk, gfsk, msk, gmsk, ook and ask ? air data rate: from 1 to 500 kbps ? fully compliant in terms of firmware and gui with the spirit1 development kits ? debug connector ? usb interface ? contains fcc id: s9nspsgrf ? rohs compliant description the steval - ids001v5m evaluation board is for the spsgrf - 915 fcc certified module based on the low - power, low - rate, sub - 1ghz spirit1 transceiver. the spsgrf - 915 module integrates the balun (balf - spi - 01d3) and a chip antenna, and operates in the 915 mhz ism band. the board is equipped with an stm32l1 low - power micro controller to control the spirit1 and it also features a usb connector for pc gui interaction and firmware updates, like the one available for spirit1 evaluation kit. an swd connector allows the development of specific firmware on the microcontroller.
schematic diagrams steval - ids001v5m 2 / 6 docid028063 rev 1 1 schematic diagrams figure 1 : steval - ids001v 5 m part 1 figure 2 : steval - ids001v 5 m part 2 u s b & e eprom d m d p d p u sb _ d m u sb _ d p d m sp i 2_ c l k sp i 2_ m o s i sp i 2_ m i s o eep r o m _ c s u sb _5 v g n d g n d g n d d _ v d d u sb _5 v g n d r 1 0 100 k s m d 040 2 1 2 j 2 u sba m a l e d i g i k e y w m 17118 - n d m o l e x 048037 - 100 0 1 2 3 4 5 6 c 1 0 100n f 16 v s m d 040 2 1 2 c 1 1 100n f 16 v s m d 040 2 1 2 u 3 m 95640 - r m c 6 t g /s 1 q 2 /w 3 gn d 4 d 5 c 6 / hol d 7 vc c 8 e_pa d 9 u 2 u sb l c 6 - 2 p 6 d 1 1 gn d 2 d 2 3 d 3 4 d 4 6 vbu s 5
steval - ids001v5m schematic diagrams docid028063 rev 1 3 / 6 figure 3 : steval - ids001v 5 m part 3 murata (cstce8m00g55-r0 ) digikey (490-1195-1-nd ) rs: 283-96 1 farnell: 161535 2 mcu - oscillato r - mcu v oltage v dd _ 2 v dd _ 1 v l c d n r ese t v dd _ 3 v dd _ a u sb _ d m u sb _ d p s w o s w d i o s w c l k v dd _ 1 v dd _ 2 v dd _ 3 v dd _ a v l c d b oo t 0 n r ese t sp i 2_ c l k sp i 2_ m o s i sp i 2_ m i s o sp i _ c s o s c _ o u t o s c _ i n o s c _ i n o s c _ o u t u s e r _ b u tt o n_ 1 u s e r _ b u tt o n_ 2 u se r _l e d _ 1 u se r _l e d _ 2 eep r o m _ c s i r q 0_ sp x x i r q 1_ sp x x i r q 3_ sp x x i r q 2_ sp x x u a r t 2_ t x u a r t 2_ r x r ese t n _ s d n d _ v d d a _ v d d g n d d _ v d d g n d g n d g n d d _ v d d d _ v d d g n d d _ v d d g n d g n d c 8 100n f 16 v s m d 040 2 1 2 stm32l 151cbu6 a u 1 s t m 32l151 c b u 6 a vlc d 1 pc13 - rtc_af1-wkup 2 2 pc14 - osc32_ in 3 pc15 - osc32_ou t 4 ph0_osc_ in 5 ph1 - osc_ou t 6 nrs t 7 vss a 8 vdd a 9 pa0 - wkup 1 1 0 pa 1 1 1 pa 2 1 2 pa 3 1 3 pa 4 1 4 pa 5 1 5 pa 6 1 6 pa 7 1 7 pb 0 1 8 pb 1 1 9 pb2 - boo t 1 2 0 pb1 0 2 1 pb1 1 2 2 vss_ 1 2 3 vdd_ 1 2 4 pb1 2 2 5 pb1 3 2 6 pb1 4 2 7 pb1 5 2 8 pa 8 2 9 pa 9 3 0 pa1 0 3 1 pa1 1 3 2 pa1 2 3 3 pa13 -jt ms - swd io 3 4 vss_ 2 3 5 vdd_ 2 3 6 pa14 -jt ck - swcl k 3 7 pa15 -jt d i 3 8 pb3 -jt do -t racesw o 3 9 pb4 - n jt rs t 4 0 pb 5 4 1 pb 6 4 2 pb 7 4 3 boot 0 4 4 pb 8 4 5 pb 9 4 6 vss_ 3 4 7 vdd_ 3 4 8 exposed_pa d 4 9 c 5 100n f 16 v s m d 040 2 1 2 r 1 1 10 k s m d 040 2 1 2 c 3 100n f 16 v s m d 040 2 1 2 c 9 1u f 10 v s m d 040 2 1 2 y 1 8 m h z 1 2 3 c 4 100n f 16 v s m d 040 2 1 2 c 7 10u f 4 v s m d 040 2 1 2 c 6 100n f 16 v s m d 040 2 1 2
schematic diagrams steval - ids001v5m 4 / 6 docid028063 rev 1 figure 4 : steval - ids001v 5 m part 4 figure 5 : steval - ids001v 5 m part 5 r f_mo du l e not mounte d s te v a l _ d i ffe r e n t ia t i o n s t e v al- i d b0 0 6v 1 m s t e v al - ids001v5 m s t e v al- i d s0 0 1v 4 m c 1 8 , c20 no t m o u nt e d not mounte d sp xx _ g p i o 0 v i n _ sp x x sp xx _ g p i o 1 sp xx _ g p i o 2 sp xx _ g p i o 3 v i n _ sp x x sp i 2_ m i s o sp i _ c s sp i 2_ m o s i r ese t n _ s d n sp i 2_ c l k sp xx _ g p i o 0 sp xx _ g p i o 1 sp xx _ g p i o 2 sp xx _ g p i o 3 sp xx _ g p i o 0 sp xx _ g p i o 1 sp xx _ g p i o 2 sp xx _ g p i o 3 sp xx _ g p i o 0 i r q 0_ sp x x i r q 1_ sp x x i r q 2_ sp x x i r q 3_ sp x x i r q 3_ sp x x g n d r f _ m o du l e _ v d d g n d g n d g n d g n d g n d g n d g n d c 2 0 100n f 16 v s m c 040 2 1 2 j 5 sp xx _ g p i o _ s t r i p 1 2 3 4 a nt . u 4 sps g r f - 86 8 ex t_lp clk / gp i o_ 3 1 nc / gp i o_ 2 2 nc / gp i o_ 1 3 sp i _ i rq / gp i o_ 0 4 v in 5 gn d 6 sp i _cl k 7 sp i _m i s o 8 sp i _mos i 9 sp i _c s 1 0 rese t n / sd n 1 1 r 1 5 0 s m d 040 2 1 2 j 4 p o w e r _ s t r i p 1 2 3 c 1 8 100n f 16 v s m c 040 2 1 2 u 7 r e s i s t o r _ a rr a y 0 o h m i/ o_1 a 1 i/ o_2 a 3 i/ o_3 a 5 i/ o_4 a 7 i/ o_4 b 8 i/ o_3 b 6 i/ o_2 b 4 i/ o_1 b 2 r 1 4 0 s m d 040 2 1 2 c 1 9 100n f 16 v s m c 040 2 1 2 p o w e r mg mt st age stmit e f l a t (do2 2 2 -aa ) p o we r n o t m o un t e d n o t m o un t e d not m o un t e d u a r t 2_ r x u a r t 2_ t x g n d v d d a _ v d d g n d v d d r f _ m o du l e _ v d d v d d g n d g n d g n d g n d u s b _5 v g n d v d d u sb _5 v d _ v d d g n d v d d c 1 6 1u f 10 v s m d 040 2 1 2 c 1 5 10n f 50 v s m d 040 2 1 2 j 3 u a r t _ s t r i p 1 2 3 4 l 1 0 . 6 o h m 300 m a s m d 040 2 1 2 c 1 7 33n f 25 v s m d 040 2 1 2 u 6 s mm 4 f 50 a l 3 0 . 6 o h m 300 m a s m d 040 2 1 2 r 1 2 0 s m d 040 2 1 2 r 1 3 0 s m d 040 2 1 2 d 3 b a t 30 f 3 c 1 4 10n f 50 v s m d 040 2 1 2 l 2 0 . 6 o h m 300 m a s m d 040 2 1 2 u 5 l d s 3985 p u 33 r d f n 6 d e x p o s e d p a d v i n 1 n c 2 v ou t 3 by p as s 4 gn d 5 v i n h 6 gnd 7 7 c 1 3 2 . 2u f 6 . 3 v s m d 040 2 1 2 c 1 2 10n f 50 v s m d 040 2 1 2
steval - ids001v5m revision history docid028063 rev 1 5 / 6 2 revision history table 1: document revision history date version changes 17 - jul - 2015 1 initial release.
steval - ids001v5m 6 / 6 docid028063 rev 1 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics C all rights reserved


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